Minimizing The Number of Tardy Jobs in Hybrid Flow Shops with Non-Identical Multiple Processors

Two-stage hybrid flow shops (a.k.a., flow shops with multiple processors (FSMPs)) are studied wherein the multiple processors at a stage are non-identical, but related (a.k.a., uniform) in their processing speeds. The impact of ten different dispatching procedures on a due-date based criterion (specifically, the number of tardy jobs) is analyzed over a set of 1,800 problems of varying configurations wherein the number of jobs per problem is between 20 and 100 and their due dates are randomly assigned. Results indicate that the modified due date (MDD), earliest due date (EDD), slack (SLK), shortest processing time (SPT), and least work remaining (LWR) rules are statistically inseparable but yield superior performance to the other rules included in this study. The longest processing time (LPT) and most work remaining (MWR) rules provide the poorest performance. Significance: FSMPs (with applications widespread throughout industry) are studied utilizing a more realistic assumption (non-identical multiple processors) than most of the extant FSMP literature (identical processors).


Introduction
When a flow shop environment is modified by adding one or more additional processors at a stage of operation (e.g., to relieve a bottleneck), a new scheduling environment is created.This environment is known by various terms: hybrid flow shop (a hybrid of pure flow shop and parallel processor environment), flexible flow lines, flexible flow shop, and flow shop with multiple processors (FSMP).FSMPs appear in a variety of applications including, but not limited, to the following (Roa, 2000): petrochemical industries; printed circuit board (PCB) assembly, see Figure 1; automotive assembly; food processing, and pharmaceutical industries.the PCBs are subjected to environmental stress screening (ESS).At any of the stages, one or more processors may exist.As aforementioned, the FSMP is manifested in a variety of enterprises (from petrochemical to food processing) but in this PCB assembly example alone, the FSPM is widespread: the US and Japanese electronics manufacturers produce more than 50% of total world's output and the global electronics industry has been estimated to be $1.5 trillion, www.ipc.org.While study of the FSMP is, compared to other scheduling environments, relatively young -with the first reported results in the 1970s (Salvador, 1973) -there has been a considerable amount of attention paid to this environment in the past two decades.With rare exception (e.g., Roa and Santos (1999), Roa (2000), Jenabi et al. (2007), Santos and Roa (2007), Rabiee et al. (2014)), however, most of the extant literature in this environment utilizes an assumption that is often not realistic.The assumption that is often used in these studies is that the multiple processors at a stage are identical in their processing speed.It is rarely the case that a newly added processor will be exactly identical in speed to the one currently in the shop because of the following reasons: the newly added equipment may be of a newer(older) generation and be faster(slower) in its processing; the newly added equipment may be from a different manufacturer than the machine(s) already in place (while they may have the same capabilities, they will likely be of differing speed); and even "identical" machines (same manufacturer, same generation) will have some natural variation between them causing them to not be equal in their processing speeds.
The purpose of this paper is to relax the assumption of identical processing speeds in a study of a two-stage FSMP with due-dates.An experiment is performed wherein 1,800 problems of varying configurations are studied where the scheduling is performed using ten different dispatching rules and the objective is to minimize the number of tardy jobs.This work is intentional in selecting dispatching rules that are easy to implement on the shop floor, much like those presented in Brah (2007), but that work considered the multiple processors at a stage to be identical.

Non-Identical Parallel Processors
Non-identical parallel processors can be categorized into two types -uniform (related) and unrelated.For the unrelated case, the processing time of a job is arbitrary, and depends on the choice of machine on which it is processed and there is no job-tojob similarity in processing times in moving from one processor to another.In this study, the non-identical processors are uniform, meaning that their processing speeds are different, but the time taken for a job to be processed on one machine is proportional to the time it would take to be processed on another machine.
In the uniform processors case, a pre-specified speed factor (sk) is the proportionality between them (Friesen andLangston, 1983 andDessouky et al., 1990).In determining the processing time of a job on a machine, we use Where, in the above, p jk is the processing time of job j on machine k with speed factor; p j is the processing time of job j without speed factor; and s k is the speed factor for machine k.

Scheduling Assumptions
Before beginning the analysis, particular assumptions about the structure of the scheduling problem are necessary to set certain boundaries to the research.In the assumptions stated below, the following notation is used: n is the number of jobs, s is the number of stages in the system, and M j is the number of machines at each stage j.
The assumptions used in this work are consistent with general studies in scheduling (French 1982) and particular investigations in other FSMP studies (Santos, Hunsucker, and Deal (2001), Brah and Loo (1999), Hunsucker and Shah (1994), among others) and are as follows: 1.A job may not be processed on more than one stage at a time; 2. The number of jobs, n, is known and fixed; 3.All jobs arrive at time zero; 4. The processing times of the jobs at each of the stages are known and are constant; 5. Set-up time is considered part of the processing time; 6. Set-up is independent of the job sequence; 7.All jobs follow the same sequence; 8.A job may only visit one machine at a stage that has multiple processors; 9.No job may be pre-empted; 10.The flow shop has s≥ 2 stages in series; 11.Each stage has M j ≥ 1 machines (j=1…s); 12.All machines are available at time zero and are fully functional during the scheduling period; 13.No machine may process more than one job at a time; 14.Machines may be idle; and 15.In-process inventory is allowed.While these assumptions are not always realistic (e.g., there are certainly some problems where set-up times are dependent upon job sequence and there are situations where in-process inventory is not allowed), this work is restricted to the above conditions.In addition to the above generalized FSMP assumptions, the following assumptions are specific to this study: 1.The number of stages is two (s = 2); 2. The due dates are known at time zero; 3. The speeds of the multiple processors at a stage are known and fixed at time zero; and 4. The performance measure investigated in this work is the number of tardy jobs (nT).

Experimental Design
Even when the identical processor case of the FSMP is considered, the scheduling environment is NP-Hard (Brah (1988 and1992)).When the processors are non-identical, the complexity increases.The intractability of this environment lends itself to study via empirical methods.As such, a study is carried out in which the number of jobs is varied from 20 to 100, the number of machines per stage is varied from 1 to 4, and the processing speeds (of the non-identical machines at a stage) varies from 1.0 to 1.5 (for references regarding the speed parameters, see Guinet (1995) and Tamimi and Rajan (1997)).
With five different job sizes (20, 40, 60, 80, and 100), twelve different environment configurations (varying the number of machines at a stage and their processing times), and with 30 problems generated per job/shop configuration, there are 1,800 problems analyzed in this study.The exact problem configurations studied in this work appear in the experimental matrix in Table 2.   0, 1.2, 1.4   1.0, 1.2, 1.4, 1.5   1.0, 1.2, 1.4, 1.5   1.0, 1.2, 1.4, 1 The number of jobs (from 20 through 100) is similar to other studies (see Younes, Santos and Maria (1998) for example).The method of obtaining the baseline processing times (e.g., times on the slowest machine) is random generation from U [1,10] and is similar to other FSMP studies (see Hunsucker and Shah (1994) and Santos, Hunsucker, andDeal (1996 and2002) among others).

Due-Date Assignment Methods (DDMs)
There are two categories of due-date assignment methods, namely, exogenous and endogenous (Conway, Maxwell, and Miller (1967)).As suggested by some researchers (e.g., Cheng, 1986), the exogenous DDMs can be associated with situations where the determination of the due date is done by a customer or internal marketing department.This determination is done without significant (if any) regard to the impact (or the relationship) of that due date to the shop environment.The exogenous DDMs yield due dates that are disassociated from the interrelationships of the jobs and the shop environment.The situation that most commonly falls under this case is presented when a customer prescribes a due date to a company.
Endogenous DDMs (sub-categorized into job-based and shop-based DDMs) are more in keeping with the integration and pacing purposes of the shop floor.They directly incorporate some aspect of the job or shop status into the computation of the due date and are typically determined by a shop manager or similar person with a comparable understanding of the shop.Furthermore, some techniques applied to problems that are not due-date based, like the shifting bottleneck method (SBM) for minimizing the makespan, utilize a constructed due-date (see Pinedo (2002)) for the embedded single machine scheduling problem.This constructed due-date is, therefore, endogenous A review of exogenous and endogenous (both job-based and shop-based) due-date assignment methods can be found in Martinez (1992) and Roa (2000).For the purposes of this work, we have opted to assign individual due dates to each job using a random method.The reason for this selection is that the random DDM is found to be more representative of realistic situations in which completely arbitrary deadlines are assigned to customers (Conway, Maxwell, and Miller (1967)).Furthermore, in Conway's (1964) seminal work in the "RAND [Corporation] study", the random DDM was utilized.
Table 3, below, augments Table 2 by including the values of the parameters used in generating the random due-dates for the jobs.The due-dates are generated from a uniform distribution, namely, U[0, max] where max varies depending upon the number of jobs (max increases with number of jobs) and shop floor configuration (max tends to decrease as more machines are available for processing).The values of the parameters for the uniform distribution in this paper are selected as shown in Table 3 for two reasons.First of all, they provide a good spread among the due dates assigned to various jobs in each simulation run.Secondly, these values of the parameters yielded a sufficient number of tardy jobs necessary to evaluate the performance of the dispatching procedures for the criteria chosen within all system configurations.In addition, each configuration has unique values of the parameters for the uniform distribution to produce an important number of tardy jobs.

Dispatching Procedures
The dispatching procedures considered in this study include those that are easy to understand and, therefore, often implemented in practice (and often with disregard to the performance measure).Of the ten included in the study, seven of these dispatching procedures require no information about the due dates of the jobs, while three of the procedures are due-date based dispatching methods.Of course, this list is certainly not exhaustive, however, several simulation studies on the identical-processors case of the FSMP have been performed with these procedures (Brah (1996), Hunsucker and Shah (1992), and Martinez (1992)) and their inclusion will allow comparisons between this study (non-identical processors) and the prior ones (identical processors).Furthermore, most of these rules are also used in due-date scheduling of job-shop scheduling environments (see Sule (1996), Morton and Pentico (1993), and Conway, Maxwell, and Miller (1967), among many others).The ten dispatching procedures studied in this work are now presented:

Scheduling Results
As the environment under study is NP-Hard, and as the number of jobs is large for most of the problems generated in the matrix, we do not have the luxury of optimal solutions for the problems in our study.An obvious lower bound of zero tardy jobs (LB(n T ) = 0) can therefore be set as a reference for comparison.For problems smaller than those included in this work, the practitioner can find optimal solutions via the use of an MILP presented by Santos and Roa (2007).
Typical statistics utilized in empirical comparisons of scheduling procedures use either relative errors or absolute errors with regards to the optimal (if known) or lower bound result.Since our lower bound is LB(n T ) = 0, we cannot use relative errors as a metric because of a division by zero result in all cases.Furthermore, since our lower bound is zero, absolute error simplifies to the results obtained by the scheduling procedures, anyway.Consequently, the statistic that will be used is simply the number of tardy jobs for comparison between the procedures.

Mean Number of Tardy Jobs (%) by Job Size
Five tables (Table 4 through Table 8), one for each job size, are now presented that provide the mean number of tardy jobs, in percentage form, for the different dispatching procedures and further categorized by shop floor configuration.
The number of tardy jobs is converted to percentage form to allow comparisons among the different job sizes (tables).The last row summarizes the statistics for all configurations for that procedure.Amalgamated results of these tables are discussed in Section 3.2.

Summary of Overall Performance
Summarized results of the optimality percentage and mean number of tardy jobs, among all 1,800 problems, according to each procedure are provided in Table 9.After each rule, the first column lists the lower bound on percentage optimality, and the second column lists the mean number of tardy jobs, expressed in percentage form (since this table summarizes all job sizes).This last column is, in fact, a conglomeration of the results in Tables 4 through 8.
As aforementioned, we do not know the optimal solutions to these 1,800 problems.One thing we do know, however, is that if no tardy jobs are found for a scheduling instance, then we have obtained an optimal solution.Of course, we do not know the cases where we may have found an optimal solution if the optimal solution has nT > 0. As such, we only know the minimum number of optimal solutions found and this number corresponds to the cases where the procedures have found n T = 0; thus, our percentage optimality is expressed in "≥ x%".In parentheses next to the percentage is the number of times in which that procedure found n T = 0.It perhaps should not be surprising that the rules that include some information about the due dates (namely, EDD, MDD, and SLK) seem, at first glance, to be superior to the others.For example, when looking at the mean percentage of number of tardy jobs, the overall results for these three rules are superior to the other procedures considered in this study.Furthermore, these three rules are the only ones in which we can guarantee to have found optimal results and these rules also have the three lowest mean number of tardy jobs (%).
However, these results are the raw data results.When looking at SPT, we can see that its mean number of tardy jobs is larger, but not appreciably different, from the three due-date based dispatching rules.The next section will provide a comparison between the ten procedures using statistical techniques to determine if there are statistically significant differences between the techniques.

Statistical Analysis of the Data
While the three due-date based rules (EDD, MDD, and SLK) seem to be superior in terms of basic data analysis -they were the only ones to arrive at known optimal solutions and have smaller mean numbers of tardy jobs -it is important to see if their performance is statistically separable from the other methods included in this study.
To test the performances of the procedures in a statistically significant manner, analysis-of-variance (ANOVA) and two multiple-comparison procedures, Least Significant Difference (LSD) test and Duncan's Multiple Range test, are performed.

ANOVA Results
An ANOVA examination is conducted with the following hypothesis test: vs. H 1 : µ i ≠ µ j for at least one pair (i, j) .

Conclusions and Recommendations
These new results are now compared with similar studies that have been performed with FSMPs with the identical-processors assumption.

Prior Results in FSMPs with Identical Multiple Processors
Hunsucker and Shah (1992) studied constrained FSMPs (where s ≥ 2); the constraint is the number of jobs concurrently allowed in the system.They utilized the same basic dispatching rules as those in this study (but did not include EDD, MDD, and SLK).
In their studies, with s = 2 and with normal congestion levels, they found that SPT yielded the best results for minimizing the number of tardy jobs, whereas LPT yielded the worst.Martinez (1992) conducted studies on various dispatching procedures and DDMs in FSMPs where s ≥ 5.The rules he considered were SPT, EDD, SLK, Operation Due Date (ODD), and Operation Slack (OPNSLK).However, while he evaluated different performance measures, nT was not among them; of the due-date based performance measures, he did evaluate mean tardiness (Tbar), mean lateness (Lbar), and percent tardiness (T%).If some similarities can be drawn (since the number of stages is greater than two (2) and since the performance measures, though due-date based, are not the same), it is important to mention that SPT performed the best with all three of these performance measures (in some cases not statistically separable from OPNSLK).Brah (1996) investigated the performance of ten dispatching rules with tardiness criteria in FSMPs .He found that the best procedures are MDD, CR + SPT, EDD, and SLK.He extended this work later (Brah, 2007).

Comparisons to Prior Studies
As compared to the prior work in FSMPs with identical processors, the experiments performed here are in agreement with those studies.
Furthermore, Conway, Maxwell, and Miller (1967) concluded that, in the job shop environment, when due dates are assigned by an exogenous method (as in this study), SPT yields good performances.Morton and Pentico (1993) and Sule (1996) reported that SPT has been successfully used for job shop scheduling to minimize tardiness of jobs in a due date environment.

Suggestions and Comments for the Practitioner
All of the rules studied in this work are both practical and easy to implement and was a significant reason for their inclusion.The hybrid flowshop environment is one that has widespread applications and markets are now driven by customers that are stressing due-dates for their products.This study has shown that hybrid flow shops, with non-identical multiple processors, can be scheduled effectively for the number of tardy jobs criterion.
Furthermore, while MDD, EDD, and SLK are not statistically separable from SPT and LWR, they do have the lowest mean number of tardy jobs (expressed in percentage) and are the only rules that we can guarantee to have found optimal solutions in our matrix of 1,800 problems.As such, we would recommend any of these three rules.Also, as earlier mentioned, for smaller problems the practitioner may rely upon an optimal technique such as the MILP developed for this problem by Santos and Roa (2007).
The interested reader may be concerned that this study presents a large amount of simulated data wherein the processing times were generated from one type of probability distribution, the uniform and one range (1-10).To reiterate, the uniform was chosen in this work because it has been utilized in many other scheduling studies as cited earlier.It is also important to note that an even earlier study was performed to determine the effect of varying the underlying processing times in the single stage multiprocessor scheduling environment (a building-block to the FSMP), see Santos (1990).In that work, different scheduling heuristics were compared while changing the underlying distribution and ranges of the processing times utilized to generate the problem instances.In that work, the uniform, Erlang, exponential, and normal distributions were studied.A conclusion was found that by changing the distributions and ranges, only minor variations were found in the performance of the heuristics and furthermore, the comparative rankings of the heuristics did not change.Hypothesizing that this finding would be extended to this work, the practitioner interested in applying the methods herein should have little worry if the processing times are not uniformly distributed.

Recommendations for Future Work
FSMP research, as previously stated, is still in its nascent stages as compared most other scheduling environments.This is particularly true for FSMPs with non-identical multiple processors.This work is just beginning to scratch the surface.Future work can incorporate more stages (s > 2), the use of different due-date assignment methods, and can focus on different performance measures (e.g., Lbar, Tbar, or others).Furthermore, for more computer integrated shop floor control systems wherein we need not restrict focus to easily implementable dispatching rules, evolutionary-based heuristics and other metaheuristics may be considered.Correspondingly, some interesting approaches to extend this work may be based on those found in Rabiee and Jolai (2014), Behnamian andZandieh (2011), andJenabi et al. (2007), among others.

Figure 1 .
Figure 1.Schematic of the Hybrid Flow Shop in Printed Circuit Board Assembly Figure 1 demonstrates the FSMP in a typical PCB facility.Herein, PCBs have through-hole technology (THT) components inserted through the board, followed by surface mount technology (SMT) components being soldered onto the board, and then

Table 1 .
Example of Uniform Processing Times

Table 3 .
Experimental Matrix with Parameters for Randomized Due-Date Assignments

Table 4 .
Mean Number of Tardy Jobs, in Percentage, for 20-Job Problems

Table 5 .
Mean Number of Tardy Jobs, in Percentage, for 40-Job Problems

Table 7 .
Mean Number of Tardy Jobs, in Percentage, for 80-Job Problems

Table 8 .
Mean Number of Tardy Jobs, in Percentage, for 100-Job Problems

Table 9 .
Summary of Overall Performance.

Table 10 and
Table 11 present the results for the LSD test and Duncan's Multiple Range test, respectively.